Delta Electronics VFD007CB21A-21 Руководство по эксплуатации онлайн [328/363] 459973

Delta Electronics VFD007CB21A-21 Руководство по эксплуатации онлайн [328/363] 459973
Chapter 14 PLC Function |C200 Series
14-43
API
10 D
CMP
P
S1 S2 D
Compare
Bit Devices Word Devices
X Y M K H KnX KnY KnM T C D
S
1
S
2
D
Operand
Operand D occupies 3 consecutive devices.
16-bit command ( 7 STEPS)
CMP
CMPP
32bits command (13 STEPS)
Flag signal: None
Explanation
1. S
1
: value comparsion 1, S
2
: value comparison 2 , D: result comparison
2. The contents in S
1
and S
2
are compared and result is stored in D.
3. The two comparison values are compared algebraically and the two values
are signed binary values. When b15 = 1 in 16-bit instruction, the comparison
will regard the value as negative binary values.
Example
1. Designate device Y0, and operand D automatically occupies Y0, Y1, and Y2.
2. When X10 = On, CMP instruction will be executed and one of Y0, Y1, and Y2
will be On. When X10 = Off, CMP instruction will not be executed and Y0,
Y1, and Y2 remain their status before X10 = Off.
3. If the user need to obtain a comparison result with , and , make a series
parallel connection between Y0 ~ Y2.
X10
Y0
Y1
Y2
CMP K10 D10 Y0
If K10>D10, Y0 = On
If K10=D10, Y1 = On
If K10<D10, Y2= On
4. To clear the comparison result, use RST or ZRST instruction.
X1
0
M0
RST
M1
RST
M2
RST

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