SilverStone SST-ST60F-ES [4/7] Strider essential series
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SilverStone SST-ST60F-ES [4/7] Strider essential series

SilverStone SST-ST60F-ES [4/7] Strider essential series
05
3.3 Regulation
3.4 Rise Time
3.3.1 ST70F-ES
The cross regulation defined as follows, the output regulation should be within
the specified range.
DC output rise time is less than 20 mS at nominal line and full load.
3.5 Hold-up Time
DC +5V output maintains at least 16mS after power off which hold within para 3.1
under 115V/60Hz and 230V/50Hz condition.
3.6 5VSB
5VSB is requierd for the implementation of PS-ON described above. 5VSB is
a standby voltage that may be used to power circuits that require power input
during the powered-down state of all power rails. The 5 VSB pin should deliver
5V ± 5% at a minimum of 2.0 A for PC board circuits to operate. Conversely,
PC board should draw no more than 2.0A maximum form this pin. This power
may be used to operate circuits such as soft power control.
Load
Light Load
Typical Load
Full Load
+5Vsb
0.5 A
1.3 A
2.5 A
-12V
0.06 A
0.15 A
0.3 A
+5V
3.3 A
8.8 A
17.6 A
+3.3V
3.3 A
8.8 A
17.6 A
+12V
9.2 A
22.4 A
44.8 A
3.3.2 ST60F-ES
Load
Light Load
Typical Load
Full Load
+5Vsb
0.45 A
1.25 A
2.5 A
-12V
0.05 A
0.15 A
0.3 A
+5V
3.24 A
8.09 A
16.2 A
+3.3V
3.24 A
8.09 A
16.2 A
+12V
7.52A
18.8 A
37.6 A
06
3.7 PG-OK
PG-OK is a power good signal and should be asserted high by power supply to indicate
that the +5 VDC and +3.3 VDC outputs are above the under-voltage thresholds of the
power supply. When this signal is asserted high, there should be sufficient mains energy
stored by the converter to guarantee continuous power operation within specification.
Conversely, when either the +5VDC or the +3.3VDC output voltage falls below the under
-voltage threshold, or when mains power has been removed for a time sufficiently long
so that power supply operation is no longer guaranteed, PG-OK should be deasserted
to a low state. See Figure 1 for a representation of the timing characteristics of the PG-
OK,PS-ON, and germane power rail signals.
Power on-off cycle : When the power supply is turned off for a minimum of 2.0 sec. and
turn on again, the power good signal will be asserted.
T1 : Turn on time ( 2 sec. Max.)
T2 : Rise time ( 20mS Max.)
T3 : Power good turn on delay time ( 100 < T3 < 500 mS )
T4 : Switch on time (0.5 sec. Max.)
T5 : Power good turn off delay time ( 1.0 mS Min.) PS-ON/OFF
T6 : Power hold-on time ( 16 mS Min.)
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Strider Essential Series
Time Diagram

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