SilverStone ST65EF [4/6] St60f p p114 5 6 pdf
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05
No damage or hazardous condition should occur with all the DC output
connectors disconnected from the load. The power supply may latch into the
shutdown state.
Figure 2. PS-OK Timing Sequence
In the event of a fan failure or the vents being blocked, the power supply shall
have protection such that any over temperature condition caused by these
events shall protect the power supply from damage or abnormal and/or
dangerous operation.
A shutdown of the power supply is acceptable.
A temperature derating factor less than 110% for the critical components is
recommended before the power supply is shut down.
Temperature derating factors higher than 110% can be evaluated on a case
by case basis.
Figure 2 is a reference for signal timing for main power connector signals and
rails.
(1)T2: Rise time (0.1ms~20ms)
(2)T3: Power good turn on delay time (100ms~500ms)
(3)T4: Power good turn off delay time (1ms min)
(4)T5: Rise time (10ms max)
4. TIMING
3.4 Over Current Protection
4.1 Signal timing drawing
06
4.2. Output Transient Response
4.3 Hold up time (T6 of figure 2.)
Table 13. summarizes the expected output transient step sizes for each output.
The transient load slew rate is =1.0A/us.
For example, for a rated +5 VDC output of 18A,the transient step would be
30% x 18A=5.4A
When the power loss its input power, The output shall maintain 10ms in regulation
ranges at nominal input voltage. (AC:115V/60Hz or 230V/50Hz/90% load).
4.4 Capacitive Load-REQUIRED
The power supply should be able to power up and operate with the regulation
limits defined in Table ,With the following capacitances simultaneously present
on the DC outputs.
Output voltages should remin within the remain within the regulation limits of
Section 2.1,and the power supply should stable when subjected to load transients
per Table 13. from any steady state load, including any or all of the following
conditions:
* Simultaneous load steps on the +12 VDC,+5 VDC, and +3.3 VDC outputs
(all steps occurring in the same direction)
* Load-changing repetition rate of 50 Hz to 10 kHz
* AC input range per Section 1.0
* +5vsb Loading min 0.1A
Table 13. DC Output Transient Step Sizes
Output
+12VDC
+5 VDC
+3.3 VDC
-12 VDC
+5 VSB
(% of rated output amps per Sec 3.2.3)
60%
30%
30%
(amps)
0.1A
0.5A
(1)
(1)
Max. step size Max. step size
STRIDER PLUS SERIES
Содержание
- St60f p 1
- St60f p p114 封面封底 pdf 1
- Strider plus series 1
- Unparalleled combination of power efficiency and flexibility 1
- Atx12v eps 12v switching power supply with active pfc ps 2 2
- Silverstone strider plus st60f p 2
- Specification 2
- St60f p p114 1 2 pdf 2
- 5vdc and 3 vdc have separate over current protection circuits to meet 240va safety requirement 3
- Any overshoot at turn on or turn off shall be less 10 of the nominal voltage value all outputs shall be within the regulation limit of section 2 before issuing the power good signal of section 5 3
- Dc output ripple noise 3
- Definition 3
- Efficiency 3
- Fignre1 ripple noise voltage test circuit 3
- Figure 1 ripple noise voltage test circuit 3
- Note 1 total combined output of 3 v and 5v is 140w 2 12v outputs power shall not exceed 504w 3 when 5v load is 24a 12v min load is 38a 4 when 12v load is 42a 5v min load is 5a 5 peak currents may last up to 17 seconds with not more than one occurrence per minute requirements 3
- Over current protection 3
- Over power protection 3
- Over voltage protection 3
- Overshoot 3
- Power supply typical efficiency is 82 under full load at nominal input voltage of 115vac or 230vac 3
- Protection 3
- Remote on off control 3
- St60f p p114 3 4 pdf 3
- Strider plus series 3
- Strider st1000 strider st1000 nv 3
- Table5 ripple regulation 3
- The over voltage sense circuitry and reference shall reside in packages that are separate and distinct from the regulator control circuity and reference no single point fault shall be able to cause a sustained over voltage condition on any or all outputs the supply shall provide latch mode over voltage protection as defined in table 3
- The power supply will be shutdown and latch off when output power is 110 160 3
- The ripple voltage of the outputs shall be measured at the pins of the output connector when terminated in the load impedance specified in figure 1 ripple and noise are measured at the connectors with a 0 uf ceramic capacitor and a 10uf electrolytic capacitor to simulate system loading ripple shall be measured under any condition of line voltage output load line frequency operation temperature 3
- When the logic level ps on is low the dc outputs are to be enabled when the logic level is high or open collector the dc outputs are to be disabled 3
- St60f p p114 5 6 pdf 4
- Strider plus series 4
- Timing 4
- Altitude 5
- Connectors 5
- Environment 5
- M b 24pin connector 5
- Mechanical requirements 5
- Mm w 86 mm h 160mm d 5
- Mtbf mean time between failures calculation 5
- Operating ac input voltage 5
- Operation 5 shipping and storage 5
- Output capacitive loads 5
- Physical dimension 5
- St60f p p114 7 8 pdf 5
- Strider plus series 5
- The demonstrated mtbf shall be 100 000 hours of continuous operation at 25 c full load 80 confidence limit and nominal line the mtbf of the power supply shall be calculated in accordance with mil std 217d e the dc fan is not included 5
- St60f p p114 9 10 pdf 6
- Strider plus series 6
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