SilverStone SST-ST75F-GS (V3.1) [7/12] Manual st75f g p177 st65f g p178 st55f g p179 v1 5

3.5 Hold-up Time

DC +5V output maintains at least 16mS after power off which hold within full load under

230V/50Hz condition.

3.6 5VSB

5VSB is requierd for the implementation of PS-ON described above. 5VSB is a standby voltage

that may be used to power circuits that require power input during the powered-down state of all

power rails. The 5 VSB pin should deliver 5V ±5% at a minimum of 3.0 A for PC board circuits to

operate. Conversely, PC board should draw no more than 3.0A maximum form this pin. This power

may be used to operate circuits such as soft power control.

3.7 PG-OK

PG-OK is a power good signal and should be asserted high by power supply to indicate that the

+5 VDC and +3.3 VDC outputs are above the under-voltage thresholds of the power supply. When

this signal is asserted high, there should be sufficient mains energy stored by the converter to

guarantee continuous power operation within specification. Conversely, when either the +5VDC

or the +3.3VDC output voltage falls below the under-voltage threshold, or when mains power has

been removed for a time sufficiently long so that power supply operation is no longer guaranteed,

PG-OK should be deasserted to a low state. See Figure 1 for a representation of the timing

characteristics of the PG-OK,PS-ON, and germane power rail signals.

3.8 3.3V Sense

A default 3.3V sense line should be implemented pin 13 of the connector.

3.9 Capacitive Load

The power supply should be able to power up and operate normally with the following capacitances

simultaneously present on the DC outputs.

Output

+5V

+12V

+3.3V

-12V

+5VS

Capacitive load (uF)

6,000

8,000

6,000

350