Acer Iconia Tab W701 i5 64Gb [11/52] Channel a

Acer Iconia Tab W701 128Gb dock [11/52] Channel a
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Layout Note:
Place near each memory part
SA00003PU00
S IC W83L771AWG-2 TSSOP 8P SENSOR
External DDR Thermal Sensor
DDR3 CLK Termination
1.CAD Note: Cterm= 1.8pF should be kept
near feeding point of first SDRAM
2.CAD Note: Rtt= 30.1ohms, Ctt= 0.1uF
should be kept within 600mils from last SDRAM
END topology
Channel A
DDR3 CTL/ADD Termination
near U56 near U57 near U58 near U59
SAGE 3GSAGE 3G SAGE 3G SAGE 3G
SAGE 3G
SAGE 3G
SAGE 3G
SAGE 3G
SAGE 3G PVT
SAGE 3G PVTSAGE 3G PVT SAGE 3G PVT SAGE 3G PVT
DDR_A_MA14
DDR_A_CS0#
DIMM_DRAMRST#
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS2
DDR_A_BS1
DDR_A_MA1
DDR_A_MA12
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA6
DDR_A_MA4
DDR_A_MA0
DDR_A_MA2
DDR_A_MA13
DDR_A_MA11
DDR_A_MA7
DDR_A_CLK0
DDR_A_ODT0
DDR_A_CKE0
DDR_A_CLK0#
DDR_A_MA14
DIMM_DRAMRST#
DDR_A_CS0#
DDR_A_BS0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
DDR_A_BS2
DDR_A_MA10
DDR_A_MA12
DDR_A_MA1
DDR_A_BS1
DDR_A_MA9
DDR_A_MA4
DDR_A_MA6
DDR_A_MA3
DDR_A_MA5
DDR_A_MA8
DDR_A_MA0
DDR_A_MA7
DDR_A_MA11
DDR_A_MA13
DDR_A_MA2
DDR_A_CLK0
DDR_A_CKE0
DDR_A_ODT0
DDR_A_CLK0#
DDR_A_MA14
DDR_A_CS0#
DIMM_DRAMRST#
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS2
DDR_A_BS1
DDR_A_MA1
DDR_A_MA12
DDR_A_MA10
DDR_A_MA9
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA6
DDR_A_MA4
DDR_A_MA0
DDR_A_MA2
DDR_A_MA13
DDR_A_MA11
DDR_A_MA7
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DQS#[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_CLK0
DDR_A_ODT0
DDR_A_CKE0
DDR_A_CLK0#
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_MA14
DIMM_DRAMRST#
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_CS0#
DDR_A_BS0
DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#
DDR_A_BS2
DDR_A_MA10
DDR_A_MA12
DDR_A_MA1
DDR_A_BS1
DDR_A_MA9
DDR_A_MA4
DDR_A_MA6
DDR_A_MA3
DDR_A_MA5
DDR_A_MA8
DDR_A_MA0
DDR_A_MA7
DDR_A_MA11
DDR_A_MA13
DDR_A_MA2
DDR_A_CLK0
DDR_A_CKE0
DDR_A_ODT0
DDR_A_CLK0#
DDR_A_MA15 DDR_A_MA15 DDR_A_MA15 DDR_A_MA15
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D2
DDR_A_D0
DDR_A_D7
DDR_A_D1
DDR_A_D15
DDR_A_D14
DDR_A_D8
DDR_A_D11
DDR_A_D10
DDR_A_D12
DDR_A_D13
DDR_A_D9
DDR_A_D25
DDR_A_D24
DDR_A_D26
DDR_A_D27
DDR_A_D30
DDR_A_D29
DDR_A_D28
DDR_A_D31
DDR_A_D21
DDR_A_D17
DDR_A_D22
DDR_A_D18
DDR_A_D19
DDR_A_D23
DDR_A_D20
DDR_A_D16
DDR_A_D38
DDR_A_D32
DDR_A_D37
DDR_A_D34
DDR_A_D33
DDR_A_D36
DDR_A_D42
DDR_A_D47
DDR_A_D41
DDR_A_D46
DDR_A_D40
DDR_A_D45
DDR_A_D44
DDR_A_D43
DDR_A_D51
DDR_A_D53
DDR_A_D48
DDR_A_D50
DDR_A_D55
DDR_A_D54
DDR_A_D49
DDR_A_D52
DDR_A_D59
DDR_A_D58
DDR_A_D56
DDR_A_D60
DDR_A_D63
DDR_A_D62
DDR_A_D39
DDR_A_D35
DDR_A_D57
DDR_A_D61
TM_D+
TM_D-
DDR_A_RAS#
DDR_A_CAS#
DDR_A_ODT0
DDR_A_CKE0
DDR_A_MA10
DDR_A_WE#
DDR_A_CS0#
DDR_A_MA15
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
DDR_A_MA12
DDR_A_MA1
DDR_A_MA0
DDR_A_MA3
DDR_A_MA4
DDR_A_MA2
DDR_A_MA11
DDR_A_MA5
DDR_A_MA6
DDR_A_MA9
DDR_A_MA13
DDR_A_MA14
DDR_A_MA8
DDR_A_MA7
DDR_A_CKE1
DDR_A_CS1#
DDR_A_ODT1
DDR_A_CS1#
DDR_A_CKE1
DDR_A_ODT1
DDR_A_CS1#
DDR_A_CKE1
DDR_A_ODT1
DDR_A_CS1#
DDR_A_CKE1
DDR_A_ODT1
DDR_A_CS1#
DDR_A_CKE1
DDR_A_ODT1
EC_SMB_CK2 14,28
EC_SMB_DA2 14,28
DDR_A_CLK0#6
DDR_A_CLK06
DDR_A_D[0..63]6
DDR_A_DQS#[0..7]6
DDR_A_DQS[0..7]6
DDR_A_MA[0..15]6
DIMM_DRAMRST#12,6
TM_D+33
TM_D-33
DDR_A_RAS# 6
DDR_A_CAS# 6
DDR_A_ODT0 6
DDR_A_CKE0 6
DDR_A_WE# 6
DDR_A_CS0# 6
DDR_A_BS0 6
DDR_A_BS1 6
DDR_A_BS2 6
DDR_A_CKE1 6
DDR_A_CS1# 6
DDR_A_ODT1 6
+0.675VS
+1.35V
+1.35V
+VREFDQ_A
+1.35V
+VREFCA_A
+1.35V
+3VS
+3VS
+1.35V
+VREFCA_A
+VREFDQ_A
+1.35V+1.35V +1.35V
+VREFCA_A
+VREFDQ_A
+VREFCA_A
+VREFDQ_A
+VREFCA_A
+VREFDQ_A
+0.675VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
DDRIII DIMMA
Custom
11 52Wednesday, March 13, 2013
2011/06/24 2012/07/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
DDRIII DIMMA
Custom
11 52Wednesday, March 13, 2013
2011/06/24 2012/07/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
DDRIII DIMMA
Custom
11 52Wednesday, March 13, 2013
2011/06/24 2012/07/12
Compal Electronics, Inc.
C1465
10U_0603_6.3V6M
C1465
10U_0603_6.3V6M
12
C1459
1U_0402_6.3V6K
C1459
1U_0402_6.3V6K
12
96-BALL
SDRAM DDR3
U56
H5TQ2G63BFR-11C_FBGA96
X76@
96-BALL
SDRAM DDR3
U56
H5TQ2G63BFR-11C_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C1478
1U_0402_6.3V6K
C1478
1U_0402_6.3V6K
12
R999
240_0402_1%
R999
240_0402_1%
1 2
C1461
1U_0402_6.3V6K
C1461
1U_0402_6.3V6K
12
C97
0.1U_0402_16V4Z
C97
0.1U_0402_16V4Z
1 2
C1254
0.1U_0402_16V4Z
C1254
0.1U_0402_16V4Z
1
2
C1479
10U_0603_6.3V6M
C1479
10U_0603_6.3V6M
12
C1481
0.1U_0402_16V4Z
C1481
0.1U_0402_16V4Z
1
2
R1102
30.1_0402_1%
R1102
30.1_0402_1%
12
C1460
1U_0402_6.3V6K
C1460
1U_0402_6.3V6K
12
C1263
2.2U_0603_6.3V6K
@
C1263
2.2U_0603_6.3V6K
@
12
R336 36_0201_1%R336 36_0201_1%
1 2
R1104
1K_0402_1%
R1104
1K_0402_1%
12
R998
240_0402_1%
R998
240_0402_1%
1 2
R1103
30.1_0402_1%
R1103
30.1_0402_1%
12
C1468
1U_0402_6.3V6K
C1468
1U_0402_6.3V6K
12
C1462
1U_0402_6.3V6K
C1462
1U_0402_6.3V6K
12
C1255
0.1U_0402_16V4Z
C1255
0.1U_0402_16V4Z
1
2
RP33
36_8P4R_5%
RP33
36_8P4R_5%
1 8
2 7
3 6
4 5
C1469
10U_0603_6.3V6M
C1469
10U_0603_6.3V6M
12
RP34
36_8P4R_5%
RP34
36_8P4R_5%
1 8
2 7
3 6
4 5
R1107
1K_0402_1%
R1107
1K_0402_1%
12
RP32
36_8P4R_5%
RP32
36_8P4R_5%
1 8
2 7
3 6
4 5
C1467
1U_0402_6.3V6K
C1467
1U_0402_6.3V6K
12
C233
2200P_0402_50V7K
C233
2200P_0402_50V7K
1
2
C1480
2.2U_0603_6.3V6K
C1480
2.2U_0603_6.3V6K
12
C1470
1U_0402_6.3V6K
C1470
1U_0402_6.3V6K
12
C1257
0.1U_0402_16V4Z
C1257
0.1U_0402_16V4Z
1
2
RP30
36_8P4R_5%
RP30
36_8P4R_5%
1 8
2 7
3 6
4 5
R1108
1K_0402_1%
R1108
1K_0402_1%
12
U4
W83L771AWG-2 TSSOP8P
SA00003PU00
U4
W83L771AWG-2 TSSOP8P
SA00003PU00
VDD
1
ALERT#
6
THERM#
4
GND
5
D+
2
D-
3
SCLK
8
SDATA
7
R997
240_0402_1%
R997
240_0402_1%
1 2
C1471
1U_0402_6.3V6K
C1471
1U_0402_6.3V6K
12
96-BALL
SDRAM DDR3
U59
H5TQ2G63BFR-11C_FBGA96
X76@
96-BALL
SDRAM DDR3
U59
H5TQ2G63BFR-11C_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
C1262
0.1U_0402_16V4Z
C1262
0.1U_0402_16V4Z
1
2
R335 36_0201_1%R335 36_0201_1%
1 2
96-BALL
SDRAM DDR3
U57
H5TQ2G63BFR-11C_FBGA96
X76@
96-BALL
SDRAM DDR3
U57
H5TQ2G63BFR-11C_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2
RP31
36_8P4R_5%
RP31
36_8P4R_5%
1 8
2 7
3 6
4 5
C1482
2.2U_0603_6.3V6K
C1482
2.2U_0603_6.3V6K
12
C1253
0.1U_0402_16V4Z
C1253
0.1U_0402_16V4Z
1
2
C1457
1.8P_0402_50V8
<BOM Structure>
C1457
1.8P_0402_50V8
<BOM Structure>
1
2
RP35
36_8P4R_5%
RP35
36_8P4R_5%
1 8
2 7
3 6
4 5
R994
240_0402_1%
R994
240_0402_1%
1 2
C1472
10U_0603_6.3V6M
C1472
10U_0603_6.3V6M
12
R995
240_0402_1%
R995
240_0402_1%
1 2
C1258
2.2U_0603_6.3V6K
@
C1258
2.2U_0603_6.3V6K
@
12
C1473
10U_0603_6.3V6M
C1473
10U_0603_6.3V6M
12
R1106
1K_0402_1%
R1106
1K_0402_1%
12
C1466
1U_0402_6.3V6K
C1466
1U_0402_6.3V6K
12
C1260
0.1U_0402_16V4Z
C1260
0.1U_0402_16V4Z
1
2
C1512
1U_0402_6.3V6K
C1512
1U_0402_6.3V6K
12
R992
240_0402_1%
R992
240_0402_1%
1 2
C1483
0.1U_0402_16V4Z
C1483
0.1U_0402_16V4Z
1
2
C1261
2.2U_0603_6.3V6K
@
C1261
2.2U_0603_6.3V6K
@
12
R996
240_0402_1%
R996
240_0402_1%
1 2
C1474
10U_0603_6.3V6M
C1474
10U_0603_6.3V6M
12
R332 36_0201_1%R332 36_0201_1%
1 2
C1256
0.1U_0402_16V4Z
C1256
0.1U_0402_16V4Z
1
2
C1252
0.1U_0402_16V4Z
C1252
0.1U_0402_16V4Z
1
2
R546 10K_0402_5%R546 10K_0402_5%
1 2
C1511
1U_0402_6.3V6K
C1511
1U_0402_6.3V6K
12
C1475
10U_0603_6.3V6M
C1475
10U_0603_6.3V6M
12
C1259
2.2U_0603_6.3V6K
@
C1259
2.2U_0603_6.3V6K
@
12
R993
240_0402_1%
R993
240_0402_1%
1 2
C1458
0.1U_0402_16V4Z
C1458
0.1U_0402_16V4Z
1 2
C1463
10U_0603_6.3V6M
C1463
10U_0603_6.3V6M
12
C1513
1U_0402_6.3V6K
C1513
1U_0402_6.3V6K
12
C1476
1U_0402_6.3V6K
C1476
1U_0402_6.3V6K
12
R333 36_0201_1%R333 36_0201_1%
1 2
+
C1464
330U_D2_2V_Y
+
C1464
330U_D2_2V_Y
12
C1514
1U_0402_6.3V6K
C1514
1U_0402_6.3V6K
12
C1477
1U_0402_6.3V6K
C1477
1U_0402_6.3V6K
12
96-BALL
SDRAM DDR3
U58
H5TQ2G63BFR-11C_FBGA96
X76@
96-BALL
SDRAM DDR3
U58
H5TQ2G63BFR-11C_FBGA96
X76@
WE
L3
RAS
J3
CAS
K3
CS/CS0
L2
CKE/CKE0
K9
CK
J7
CK
K7
DQSU
B7
BA0
M2
BA1
N8
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
VSSQ
D1
VSS
A9
VSS
E1
VSS
B3
NC/ODT1
J1
VDD
B2
VDD
D9
VDDQ
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
NC/CS1
L1
NC/CE1
J9
VDDQ
E9
ZQ/ZQ0
L8
RESET
T2
DQSL
F3
DMU
D3
DML
E7
VSSQ
B1
VSSQ
B9
VSSQ
D8
VSSQ
E2
DQSU
C7
VSSQ
E8
DQSL
G3
VDDQ
F1
VSSQ
F9
VSSQ
G1
VDDQ
H2
VDDQ
H9
VSSQ
G9
VREFCA
M8
VSS
G8
VDD
G7
ODT/ODT0
K1
A0
N3
A1
P7
VDD
K2
A12
N7
VSS
J2
VDD
K8
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
DQU0
D7
A13
T3
A14
T7
A15/BA3
M7
BA2
M3
VREFDQ
H1
NCZQ1
L9
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VDDQ
D2

Содержание

Скачать
Случайные обсуждения

Ответы 1

Какие порты USB есть на плате?
1 год назад

Ответы 1

What is the document number of the LA-A041P MB Rev2?
2 года назад