Acer Iconia Tab W701 i5 64Gb [5/52] 06 24 2012 06 02

Acer Iconia Tab W701 i5 64Gb [5/52] 06 24 2012 06 02
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Buffered reset to CPU
Follow DG 1.2 & CRB1.0 Use open drain MOS:
+1.05VS_VTT PH pop 75ohm
series resister pop 43ohm
CRB1.0 PH 1K +3VS
Check list 1.0 PH 5K +3VS
Check list 1.2 PH 10K +3VS
Debug port DG1.1-1.2 50~5K ohm
Checklist1.0 P.64 Processor Graphis Disable Guide
DIS only SKU or UMA eDP disable
DPLL_REF_SSCLK PD 1K_5% to GND
DPLL_REF_SSCLK# PH 1K_5% to +1.05VS_VTT
XBOX
CPU
RESET#: ok CPU reset
DDR3 Compensation Signals
Trace:10mil ,Spacing:13mil, Max.Length:500mil
PROC_SELECT#
Future platforms,PH VCPLL and connect to PCH DF_TVS
PCH->CPU
UNCOREPWRGOOD:
CORE OK
SM_DRAMPWROK:DRAM power ok
RESET#: ok CPU reset
For EMI
Processor Pullups follow CRB1.0
SM_DRAMPWROK:DRAM power ok
UNCOREPWRGOOD: CPU_CORE OK
Follow DG 1.2 & CRB1.0
Follow DG 1.2 & CRB1.0
Use open drain MOS:
+1.35VS PH pop 200ohm
series resister pop 130ohm
SAGE 3G
SAGE 3G
SAGE 3G
SAGE 3G
XDP_TDI
XDP_TDO
BUF_CPU_RST#
XDP_DBRESET#
BUFO_CPU_RST#
XDP_DBRESET#
H_CPUPWRGD_R
H_CATERR#
CLK_CPU_DPLL#
CLK_CPU_DPLL
XDP_TCK
XDP_TMS
XDP_TRST#
SM_RCOMP1
SM_RCOMP2
SM_RCOMP0
H_CPUPWRGD
H_PROCHOT#_RH_PROCHOT#
H_CPUPWRGD
PM_DRAM_PWRGD_R
BUF_CPU_RST#
SM_DRAMRST#
CLK_CPU_DPLL#
CLK_CPU_DPLL
H_PECI
PM_SYS_PWRGD_BUF PM_DRAM_PWRGD_R
H_CPUPWRGD18
CLK_CPU_DPLL# 14
CLK_CPU_DPLL 14
H_THRMTRIP#18
H_SNB_IVB#17
H_PROCHOT#28,36
CLK_CPU_DMI# 14
CLK_CPU_DMI 14
XDP_DBRESET# 15
H_PM_SYNC15
SM_DRAMRST# 6H_PECI28
PLT_RST#17,26,28,31,32
PM_DRAM_PWRGD15
SYS_PWROK15
VR_ON28,42
+1.05VS_VTT
+3VS
+1.05VS_VTT
+1.05VS_VTT
+3VS
+1.35VS
+3VALW
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
5 52Wednesday, March 13, 2013
2011/06/24 2012/06/02
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
5 52Wednesday, March 13, 2013
2011/06/24 2012/06/02
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
V1JB1 M/B LA-A041P Schematic
0.1
PROCESSOR(2/7) PM,XDP,CLK
Custom
5 52Wednesday, March 13, 2013
2011/06/24 2012/06/02
Compal Electronics, Inc.
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
UCPU1B
IVY-BRIDGE_BGA1023
IVB@
CLOCKS
MISC THERMAL PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
UCPU1B
IVY-BRIDGE_BGA1023
IVB@
SM_RCOMP[1]
BE43
SM_RCOMP[2]
BG43
SM_DRAMRST#
AT30
SM_RCOMP[0]
BF44
BCLK#
H2
BCLK
J3
DPLL_REF_CLK#
AG1
DPLL_REF_CLK
AG3
CATERR#
C49
PECI
A48
PROCHOT#
C45
THERMTRIP#
D45
SM_DRAMPWROK
BE45
RESET#
D44
PRDY#
N53
PREQ#
N55
TCK
L56
TMS
L55
TRST#
J58
TDI
M60
TDO
L59
DBR#
K58
BPM#[0]
G58
BPM#[1]
E55
BPM#[2]
E59
BPM#[3]
G55
BPM#[4]
G59
BPM#[5]
H60
BPM#[6]
J59
BPM#[7]
J61
PM_SYNC
C48
PROC_DETECT#
C57
PROC_SELECT#
F49
UNCOREPWRGOOD
B46
U15
SN74LVC1G07DCKR_SC70-5
U15
SN74LVC1G07DCKR_SC70-5
NC
1
A
2
G
3
Y
4
P
5
R117 1K_0402_5%@R117 1K_0402_5%@
12
R223 10K_0402_5%R223 10K_0402_5%
12
R81 0_0402_5%@R81 0_0402_5%@
1 2
R226
75_0402_5%
R226
75_0402_5%
12
U5
MC74VHC1G09DFT2G_SC70-5
U5
MC74VHC1G09DFT2G_SC70-5
B
2
A
1
Y
4
P
5
G
3
R220 62_0402_5%R220 62_0402_5%
12
T4PAD@ T4PAD@
T3PAD@ T3PAD@
R82 0_0402_5%@R82 0_0402_5%@
1 2
R227
43_0402_1%
R227
43_0402_1%
1 2
T6PAD@ T6PAD@
R216
56_0402_5%
R216
56_0402_5%
1 2
C784 0.1U_0201_10V6K
@
C784 0.1U_0201_10V6K
@
12
C101
0.1U_0402_16V4Z
C101
0.1U_0402_16V4Z
1
2
T5PAD@ T5PAD@
R88
200_0402_5%
R88
200_0402_5%
12
R569 1K_0402_5%R569 1K_0402_5%
12
R149 140_0402_1%R149 140_0402_1%
12
C396
0.1U_0402_16V4Z
C396
0.1U_0402_16V4Z
1
2
T1 PAD
@
T1 PAD
@
R486 25.5_0402_1%R486 25.5_0402_1%
12
T2PAD@ T2PAD@
R97 130_0402_5%R97 130_0402_5%
1 2
R80 0_0402_5%
@
R80 0_0402_5%
@
1 2
R484 200_0402_1%R484 200_0402_1%
12
R116 1K_0402_5%@R116 1K_0402_5%@
12
C102
100P_0402_50V8J
XEMC@C102
100P_0402_50V8J
XEMC@
1 2

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What is the document number of the LA-A041P MB Rev2?
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