Omron NYB1E-31002 [221/276] Appendices

Omron NYB1E-413D2 [221/276] Appendices
Item Default / Remark
Processor
(Integrated
Components)
Memory Configuration / Memory Training Algorithms
Write Voltage Centering 2D Enabled
Read Voltage Centering 2D Enabled
Late Command Training Enabled
Round Trip Latency Enabled
Turn Around Timing Training Enabled
Rank Margin Tool Disabled
Memory test Disabled
DIMM SPD Alias Test Enabled
Receive Enable Centering 1D Enabled
Retrain Margin Check Enabled
Write Drive Strength Up/Dn inde-
pendently
Disabled
CMD Slew Rate Training Enabled
CMD Drive Strength / Tx Equaliza-
tion
Enabled
CMD Normalization Enabled
Memory Configuration MRC ULT Safe Config Disabled
Maximum Memory Frequency Auto
HOB Buffer Size Auto
ECC Support Enabled
Max TOLUD Dynamic
SA GV Fixed High
Retrain on Fast Fail Enabled
Command Tristate Enabled
Enable RH Prevention Enabled
Row Hammer Solution Hardware RHP
RH Activation Probability 1/2^11
Exit On Failure (MRC) Enabled
MC Lock Enabled
Probeless Trace Disabled
Enable/Disable IED (Intel En-
hanced Debug)
Disabled
Ch Hash Support Enabled
Ch Hash Mask 0
Ch Hash Interleaved Bit BIT8
VC1 Read Metering Enabled
VC1 RdMeter Time Window 800
VC1 RdMeter Threshold 280
Strong Weak Leaker 7
Memory Scramble Enabled
Force ColdReset Disabled
Channel A DIMM Control Enable both DIMMs
Channel B DIMM Control Enable both DIMMs
Appendices
A-21
NY-series Industrial Box PC Hardware User's Manual (W553)
A-1 BIOS
A
A-1-3 BIOS for 6
th
generation CPUs

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