Pioneer A-30-K [19/57] Cvianam1656a

Pioneer A-20-K [19/57] Cvianam1656a
19
A-30-K
5
6 7 8
5
6 7 8
A
B
C
D
E
F
1/3
CVIANAM1656A
(Micro Controller)
V
REF-
AIN10/PF0
AIN7/PB7
AIN6/PB6
[I2C_SDA] AIN5/PB5
[I2C_SCL] AIN4/PB4
[TIM1_ETR] AIN3/PB3
[TIM1_CH3N] AIN2/PB2
[TIM1_CH2N] AIN1/PB1
[TIM1_CH1N] AIN0/PB0
AIN8/PE7
AIN9/PE6
AIN11/PF3
V
REF+
V
DDA
V
SSA
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 29 30 31 3225 26 27 28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
SS
VCAP
V
DD
V
DDIO_1
[TIM3_CH1] TIM2_CH3/PA3
UART1_RX/ (HS) PA4
UART1_TX/ (HS) PA5
UART1_CK/ (HS) PA6
AIN15/PF7
AIN14/PF6
AIN13/PF5
AIN12/PF4
NRST
OSCIN/PA1
OSCOUT/PA2
V
SSIO_1
PG1/CAN_RX
PG0/CAN_TX
PC7 (HS)/SPI_MISO
PC6 (HS)/SPI_MOSI
V
DDIO_2
V
SSIO_2
PC5 (HS)/SPI_SCK
PC4 (HS)/TIM1_CH4
PC3 (HS)/TIM1_CH3
PC2 (HS)/TIM1_CH2
PC1 (HS)/TIM1_CH1
PE5/SPI_NSS
PI0
PG4
PG3
PG2
PD3 (HS)/TIM2_CH2[ADC_ETR]
PD2 (HS)/TIM3_CH1[TIM2_CH3]
PD1 (HS)/SWIM
PD0 (HS)/TIM3_CH2 [TIM1_BKIN] [CLK_CCO]
PE0 (HS)/CLK_CCO
PE1 (T)/I2C_SCL
PE2 (T)/I2C_SDA
PE3/TIM1_BKIN
PE4
PG7
PG6
PG5
PD7/TLI [TIM1_CH4]
PD6/UART3_RX
PD5/UART3_TX
PD4 (HS)/TIM2_CH1 [BEEP]
Pin Layout
1. (HS) high sink capability.
2. (T) True open drain (P-buffer and protection diode to VDD not implemented).
3. [ ] alternate function remapping option (If the same alternate function is shown twice, it indicates an exclusive choice not a
duplication of the function).
4. CAN_RX and CAN_TX is available on STM8S208xx devices only.

Содержание