GRINN LITESOM-IMX6UL-E [11/16] Boot configuration pins

GLS Series Datasheet v1.0

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(1) LCD_DATA[23:0] terminals are respectively BT_CFG1 [7:0] inputs, latched on power-up. External 10k-47k pull-up/pull-down resistors are

needed on these terminals for proper boot configuration.

(2) Pins can be used to:

• feed external reference clock to the PLLs and further on to the modules inside SoC.

• output internal SoC clock to be used outside the SoC as either reference clock or as a functional clock for peripherals.

See the i.MX 6UltraLite Reference Manual (IMX6ULRM) for details on the respective clock trees.

(3) Pins belong to NVCC_NAND power group. This group is used to internal eMMC connection, which determinates power supply of 3.3V.

3.2. Boot Configuration Pins

Pins BOOT_MODE [1:0] are used to select system boot mode.

BOOT_MODE1

BOOT_MODE0

Boot Mode

LOW LOW Boot from Fuses

LOW HIGH Serial Downloader

HIGH LOW Internal Boot

HIGH HIGH Reserved

For complete Boot Mode configuration description see section 8 of i.MX 6UltraLite Reference Manual.

During the boot process on the first mode i.MX 6UltraLite processor senses BT_CFGx[7:0] configuration pins (see

LCD_DATA[23:0] for pin description). It is latched on power-up state, thus every BT_CFGx[7:0] fuse should have

external pull-up/pull-down resistor connected. For complete BT_CFGx[7:0] pin configuration description see

section 5 of i.MX 6UltraLite Reference Manual.