Biostar TA960 Версия 6.x [21/35] Chipset menu

Biostar TA960 Версия 6.x [21/35] Chipset menu
TA960 BIOS Manual
20
5 Chipset Menu
This submenu allows you to configure the specific features of the chipset
installed on your system. This chipset manage bus speeds and access to
system memory resources, such as DRAM. It also coordinates
communications with the PCI bus.
BIOS SETUP UTILITY
Main Advanced
PCIPnP Boot
Chipset Performance
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
Options for SBAdvanced Chipset Settings
> Northbridge Configuration
> OnBoard Peripherals
> SouthBridge Configuration
Exit
SouthBridge Configuration
BIOS SETUP UTILITY
Chipset
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Go to Sub Screen
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
> EC Configuration
OHCI HC(Bus 0 Dev 18 Fn 0) [Enabled]
OHCI HC(Bus 0 Dev 18 Fn 1) [Enabled]
EHCI HC(Bus 0 Dev 18 Fn 2) [Enabled]
OHCI HC(Bus 0 Dev 19 Fn 0) [Enabled]
OHCI HC(Bus 0 Dev 19 Fn 1) [Enabled]
EHCI HC(Bus 0 Dev 19 Fn 2) [Enabled]
OHCI HC(Bus 0 Dev 20 Fn 5) [Enabled]
OnChip SATA Channel [Enabled]
OnChip SATA Type [Native IDE]
SouthBridge Chipset Configuration
SB CIMx Version :
> SB Azalia Audio Configuration
Options for SB HD
Azalia

Содержание

Скачать