Biostar N68S3+ Версия 6.x [34/39] N68s3 bios manual

Biostar N68S3+ Версия 6.x [34/39] N68s3 bios manual
N68S3+ BIOS Manual
33
tWTR
Options: Auto (Default) / 4~7 CLK
tRFC0 / tRFC1 / tRFC2 / tRFC3
Options: Auto (Default) / 90ns / 110ns / 160ns / 300ns / 350ns
Memory Configuration
BIOS SETUP UTILITY
vxx.xx (C)Copyright 1985-200x, American Megatrends, Inc.
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit
+-
F1
F10
ESC
Memory Configuration
Bank Interleaving [Auto]
Channel Interleaving [XOR of Address bit]
Enable Clock to All DIMMs [Disabled]
MemClk Tristate C3/ATLVID [Disabled]
Memory Hole Remapping [Enabled]
DCT Unganged Mode [Always]
Power Down Enable [Disabled]
Page Smashing [Disabled]
Enable Bank Memory
Interleaving
Performance
Bank Interleaving
Bank Interleaving is an advanced chipset technique used to improve memory
perform ance. Memory interleaving increases bandwidth by allowing simultaneous
access to more than one piece of memory.
Options: Auto (Default)
Channel Interleaving
This item allows you to control the DDR2 dual-channel function.
Options: XOR of Address bits [20:16, 6] (Default) / XOR of Address bits
[20:16, 9] / Address bits 6 / Address bits 12 / Disabled
Enable Clock to All DIMMs
This item determines whether the BIOS should actively reduce EMI
(Electromagn etic Interference) and reduce power consumption by turning off
unoccupied or inactive DIMM slots.
Options: Disabled (Default) / Enabled

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