RME ADI-6432 REDUNDANT BNC [18/40] Word clock

User's Guide ADI-6432R BNC © RME

11. Word Clock

11.1 Word Clock Input and Output

SteadyClock guarantees an excellent performance in all clock modes. Its highly efficient jitter

suppression refreshes and cleans up any clock signal, and provides it as reference clock at the

BNC output (see section 14.5).

Input

The ADI-6432's word clock input is active when WCK is chosen in the clock section. The signal

at the BNC input can be Single, Double or Quad Speed, the ADI-6432 automatically adapts to it.

As soon as a valid signal is detected, the WCK LED is constantly lit, otherwise it is flashing.

Thanks to RME's Signal Adaptation Circuit, the word clock input still works correctly even with

heavily mis-shaped, dc-prone, too small or overshoot-prone signals. Thanks to automatic signal

centering, 300 mV (0.3V) input level are sufficient in principle. An additional hysteresis reduces

sensitivity to 1.0 V, so that over- and undershoots and high frequency disturbances don't cause

a wrong trigger.

The ADI-6432's word clock input is shipped as high impedance

type (not terminated). A push switch allows to activate internal

termination (75 Ohms). The switch is found on the back beside

the BNC jacks. Use a small pencil or similar and carefully push

the blue switch so that it snaps into its lock position. Another

push will release it again and de-activate the termination.

Output

The word clock output is constantly active, providing the current sample frequency as word

clock signal. In master mode, the word clock will be fixed to 44.1 kHz or 48 kHz (DS x 2, QS x

4). In any other case the sample rate is identical to the one present at the currently chosen

clock input. When the current word clock source fails, the last valid sample rate will be held

automatically.

The word clock signal received by the ADI-6432 can be distributed to other devices by using the

word clock output. With this the usual T-adapter can be avoided, and the ADI-6432I operates as

Signal Refresher. This kind of operation is highly recommended, because

• Input and output are phase-locked and in phase (0°) to each other

• SteadyClock removes nearly all jitter from the input signal

• the exceptional input (1 Vpp sensitivity instead of the usual 2.5 Vpp, dc cut, Signal Adapta-

tion Circuit) plus SteadyClock guarantee a secure function also with most critical word

clock signals.

Thanks to a low impedance, but short circuit proof output, the ADI-6432 delivers 4 Vpp to 75

Ohms. For wrong termination with 2 x 75 Ohms (37.5 Ohms), there are still 3.3 Vpp at the out-

put.