ASRock X299 Taichi CLX [83/119] Bclk frequency

English

X299 Taichi CLX

BCLK Frequency

e CPU speed is determined by the CPU Ratio multiplied with the BCLK. Increasing the

BCLK will increase the internal CPU clock speed but also aect the clock speed of other

components.

DRAM Reference Clock

Select Auto for optimized settings.

DRAM Frequency

If [Auto] is selected, the motherboard will detect the memory module(s) inserted

and assign the appropriate frequency automatically.

Primary Timing

CAS# Latency (tCL)

e time between sending a column address to the memory and the beginning of the data

in response.

RAS# to CAS# Delay (tRCD)

RAS# to CAS# Delay : e number of clock cycles required between the opening of a row

of memory and accessing columns within it.

Row Precharge (tRP)

Row Precharge: e number of clock cycles required between the issuing of the precharge

command and opening the next row.

RAS# Active Time (tRAS)

e number of clock cycles required between a bank active command and issuing the

precharge command.

Command Rate (CR)

e delay between when a memory chip is selected and when the rst active command can

be issued.

Secondary Timing

Write Recovery Time (tWR)

e amount of delay that must elapse aer the completion of a valid write operation,

before an active bank can be precharged.