Biostar GF8200 M2G+ Версия 6.x [29/37] Gf8200 m2g bios manual

Biostar GF8200 M2G+ Версия 6.x [29/37] Gf8200 m2g bios manual
GF8200 M2G+ BIOS Manual
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DRAM Timing Configuration
BIOS SETUP UTILITY
vxx.xx (C)Copyright 198 5-200x, American Megatre nds, Inc.
Select Screen
Select Item
Go to Sub Scr een
General Help
Save and Exit
Exit
Enter
F1
F10
ESC
DRAM Timing Configuration
Memory CLK
CAS Latency(Tcl)
RAS/CAS Delay(Tr cd)
Row Precharge Ti me(Trp)
Min Active RAS(T ras)
RAS/RAS Delay(Tr rd)
Row Cycle (Trc)
Command Rate(CR)
> Memory Configuratio n
DRAM Timing Mode [Auto]
CAS Latency(CL) [Auto]
2T Command [Auto]
TRCD [Auto]
TRP [Auto]
Performance
Memory Configuration
BIOS SETUP UTILITY
vxx.xx (C)Copyright 198 5-200x, American Megatre nds, Inc.
Select Screen
Select Item
Change Option
General Help
Save and Exit
Exit
+-
F1
F10
ESC
Memory Configurati on
Bank Interleaving [Auto]
Enable Clock to Al l DIMMs [Disabled]
MemClk Tristate C3 /ATLVID [Disabled]
Memory Hole Remapp ing [Enabled]
Power Down Enable [Enabled]
Power Down Mode [Channel]
Enable Bank Memo ry
Interleaving
Performance
Bank Interleaving
Bank Interleaving is an advanced chipset technique used to improve memory
performance. Memory interleaving increases bandwidth by allowing simultaneous
access to more than one piece of memory.
Options: Auto (Default) / Disabled

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