Biostar M7VIT 800 [42/57] Bios setup

Biostar M7VIT 800 [42/57] Bios setup
BIOS Setup
13
When DRAM is installed, the number of clock cycles of CAS latency depends on
the DRAM timin g.
The Choices: 2.5 (default), 2.
Bank Interleave
This item allows you to enable or disable the bank interleave feature.
The Choices: Disabled (default), 2 bank, 4 bank.
Precharge to Active (Trp)
This items allows you to specify the delay from precharge command to activate
command.
The Choices: 2T, 3T, 4T, 5T (default).
Tras Non-DDR400/ DDR400
This items allows you to set Tras Non-DDR400/DDR400.
The Choices: 7T/10T (default), 6T/8T, 5T/6T, 8T/12T.
Active to CMD (Trcd)
Use this item to specify the delay from the activation of a bank to the time that a
read or write command is accepted.
The Choices: 2T, 3T, 4T, 5T (default).
DRAM Burst Length
The Choices: 4 (default), 8.
DRAM Queue Depth
This item permits to place the depths of the memory. The deeper the depth is,
the better is this function.
The Choices: 4 level (default), 2 level, 3 leve l.
DRAM Command Rate
This item controls clock cycle that must occur between the last valid write
operation and the next command.
The Choices: 1T Command, 2T Co mmand (default).
Write Recovery Time
This item allows you to select the recovery time.
The Choices: 3T (default), 2T.
tWTR for DDR400 ONLY
This item allows you to choose tWTR for DDR 400 only.
The Choices: 3T (default), 1T, 2T.
AGP & P2P Bridge Control
If you highlight the literal “Press Enter” next to the “AGP & P2P Bridge Controllabel and
then press the enter key, it will take you a submenu with the follow in g options:

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