MSI FM2-A85XMA-P33 [43/160] English

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▶tCL

Controls CAS latency which determines the timing delay (in clock cycles) of starting

a read command after receiving data.

▶tRCD

Determines the timing of the transition from RAS (row address strobe) to CAS

(column address strobe). The less clock cycles, the faster the DRAM performance.

▶tRP

Controls number of cycles for RAS (row address strobe) to be allowed to pre-charge.

If insucient time is allowed for RAS to accumulate before DRAM refresh, the DRAM

may fail to retain data. This item applies only when synchronous DRAM is installed

in the system.

▶tRAS

Determines the time RAS (row address strobe) takes to read from and write to

memory cell.

▶tRFC

This setting determines the time RFC takes to read from and write to a memory

cell.

▶tWR

Determines minimum time interval between end of write data burst and the start of a

pre-charge command. Allows sense ampliers to restore data to cell.

▶tWTR

Determines minimum time interval between the end of write data burst and the start

of a column-read command; allows I/O gating to overdrive sense amplies before

read command starts.

▶tRRD

Species the active-to-active delay of dierent banks.

▶tRTP

Time interval between a read and a precharge command.

▶tFAW

This item is used to set the tFAW (four activate window delay) timing.

▶tWCL

This item is used to set the tWCL (Write CAS Latency) timing.

▶tCKE

This item is used to set the Pulse Width for DRAM module.

▶tRTL

This item is used to set Round Trip Latency settings.

▶Advanced Channel 1/ 2 Timing Conguration

Press <Enter> to enter the sub-menu. And you can set the advanced memory timing

for each channel.

▶Spread Spectrum

This function reduces the EMI (Electromagnetic Interference) generated by modulating

clock generator pulses.