Omron NYB1E-C13C6 [249/276] Memory thermal configuration

Omron NYB1E-413D1 [249/276] Memory thermal configuration
BIOS - Chipset Details
This section provides BIOS Chipset details for:
6
th
generation CPUs
7
th
generation CPUs with a BIOS version upto version 008
For all other CPU types or BIOS versions refer to BIOS - Chipset on page A-43 for details.
¢
Memory Thermal Configuration
Provides BIOS Chipset details for the submenu Processor / Memory Configuration / Memory
Thermal Configuration /.
Changeable BIOS Memory Thermal Configuration parameters and their factory default values:
Item Default / Remark
Memory Power
and Thermal
Throttling
DDR PowerDown and idle counter BIOS
For LPDDR Only: DDR PowerDown annd idle counter BIOS
REFRESH_2X_MODE Disabled
LPDDR Thermal Sensor Enabled
SelfRefresh Enable Enabled
SelfRefresh IdleTimer 512
Throttler CKEMin Defeature Disabled
Throttler CKEMin Timer 48
For LPDDR Only: Throttler CKEMin Defeature
*1
Enabled
For LPDDR Only: Throttler CKEMin Timer
*1
64
DRAM Power Me-
ter
Use user provided power weights, scale
factor
, and channel power floor values
Disabled
Memory Thermal
Reporting
Lock Thermal Management Registers Enabled
Extern Therm Status Disabled
Closed Loop Therm Manage Disabled
Open Loop Therm Manage Disabled
Thermal Threshold Settings All settings = 255
Thermal Throttle Budget Settings All settings = 255
Memory RAPL RAPL PL Lock Disabled
RAPL PL 1 enable Disabled
RAPL PL 1 Power 0
RAPL PL 1 WindowX 0
RAPL PL 1 WindowY 0
RAPL PL 2 enable Disabled
RAPL PL 2 Power 222
RAPL PL 2 WindowX 1
RAPL PL 2 WindowY 10
Memory Thermal Management Disabled
*1.
Available for 7
th
generation CPUs. Not available for 6
th
generation CPUs.
Appendices
A-49
NY-series Industrial Box PC Hardware User's Manual (W553)
A-1 BIOS
A
A-1-4 BIOS for 7
th
generation CPUs

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